Plenary Talks
来源: | 作者:ieee | 发布时间: 2021-05-23 | 2443 次浏览 | 分享到:


Plenary Talks





Chiplet technique in future: package, interconnection, and power supply

Wei Tsao, HiSilicon Technologies Co., Ltd

Abstract:

Huge logic chip always needs huge memory and big bandwidth transceivers to help. However, the progress of memory size is not as fast as logic scale, and some mature analog designs can't gain the profit from the latest semiconductor technology for less Gm and smaller headroom. To balance all factors, CHIPLET is introduced, which refers to the technique to connect more than one dies within the same package body. Many new package techniques such as Fanout, interposer, and TSV, in addition to MCM, bring opportunities and challenges for potential chiplet applications. The first challenge on chiplet is the interconnect-scheme for signals to adapt kinds of package channels. Today's interconnection technique must consider latency, bandwidth on unit edge width, and power consumption efficiency. The second challenge is the power-supply scheme. With the raise of silicon instances density, it becomes difficult for power management units to provide sufficient currents with limited power-routing resources. This presentation gives some guides and solutions for both items, including parallel bus, XSR SerDes, OCLDO, and IVR.

Speaker

 


Dr. Wei Tsao is currently Chief Architect and Shanghai Branch Director of Analog Design Department, Hisilicon Inc., responsible for architecture competitiveness of Hisilicon analog-digital mixed IP, and in charge of analog development team in Shanghai. He joined in Hisilicon in 2009, and has delivered many key analog-digital mixed IP for Huawei products, including the Ethernet PHY, High Bandwidth Memory interface PHY, Ultra-high speed converters, PCIE SerDes etc. Before joining Hisilicon, Dr. Wei Tsao has mixed signal chip development and management experiences in high-speed interconnect PHY/SerDes area for storage and communication products, with several companies in US. He has worked as architect in mixed signal area for 20 years.

Dr. Wei Tsao has published more than 10 papers in journals and conferences, he has many China and US patents as first or co-inventor. His current main interest is in Ultra-high speed physical layer technique, mixed signal system architecture and automotive mixed signal chip solution. Dr. Wei Tsao received his BS and PhD from Shanghai Jiaotong University.


Control of Electronic Charges and Currents

in Nano-scaled Silicon 

Yukinori Ono, Research Institute of Electronics, Shizuoka University

Abstract:

Silicon (Si) has been the most important material for electronics, and the devices fabricated on it have been down-sized to nanometer scales. The speaker has devoted his research to the study of electron transport in nano-scaled Si, proposing and demonstrating several kinds of new functional devices. This talk introduces five kinds of devices: the single-electron pump, the single-atom transistor, the single-atom pump, the single-collision hot-electron transistor, and the hydrodynamic electron aspirator. All these devices are based on the Si metal-oxide-semiconductor field-effect transistor (MOSFET) technology, and enjoy unique properties that emerge in nano-scaled Si. They operate in a more functional manner than the conventional MOSFETs do, and thus are promising for future quantum nano-electronics.

Speaker

Yukinori Ono received B. Eng. degree in 1986, M. Sci. degree in 1988, and Ph.D. in 1996, all from Waseda University, Tokyo, Japan. In 1988, he joined Nippon Telegraph and Telephone (NTT) Corporation, Kanagawa, Japan. Since then, he has been engaged in research on physics and technology of nanometer-scaled silicon, in particular aiming at the invention of new functional devices for quantum electronics. From November 1996 to December 1997, he was a visiting scientist at Massachusetts Institute of Technology. In 2012, he moved to Toyama University, Toyama, Japan, and in 2016, to Shizuoka University, Hamamatsu, Japan. He is now a professor at the Research Institute of Electronics, and research fellow of Shizuoka University. From 2019, he is also working as the program officer of the Research Center for Science Systems of JSPS (Japan Society for the Promotion of Science). He is an author or co-author of more than 100 scientific papers, and won several awards, including the Commendation by MEXT (the Minister of Education, Culture, Sports, Science and Technology), and Takayanagi Memorial award.