Agenda
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Program at a Glance of IEEE ICTA 2022

Friday, 28 October 2022

Time

Section

08:30-10:10

 (100 mins)

Tutorial 1A

(Room A)

Prof. Zhao Zhang/ Institute of Semiconductors, 

             Chinese Academy of Sciences, China

Design of Low-Power PLL and CDR Integrated Circuits for High-Speed Wireless/Wireline Communication

Tutorial 1B

(Room B)

Prof. Peng Lin/ Zhejiang University, China

                                    Memristive Devices for Analog Computing

10:20-12:00

(100 mins)

Tutorial 2A

(Room A)

Prof. Wei Deng/ Tsinghua University, China

Joint Radar-Communication CMOS Transceiver: From System Architecture to Circuit Design

Tutorial 2B

(Room B)

Prof. Yimeng Zhang/ Xidian University, China

             Design of Integrated Circuits for High Temperature Applications

12:00-14:00

Lunch Break

14:00-15:40

 (100 mins)

Tutorial 3A

(Room A)

Prof. Dan Li/ Xi'an Jiaotong University, China

            Overcoming the Transimpedance Limit: 

             A Tutorial on Design of Low-Noise TIA

Tutorial 3B

(Room B)

Prof. Chixiao Chen/ Fudan University, China

Break the Memory Wall: Cross-Layer Co-Design 

for Energy Efficient AI Processors

15:50-16:10

(20 mins)

ICTA Opening Ceremony

 (Room A)

WELCOME MESSAGE - GENERAL CHAIR

Prof. Nanning Zheng/ Xian Jiaotong University, China

OVERVIEW - TECHNICAL PROGRAMME CO-CHAIRS

Prof. Zhiyi Yu/ Sun Yat-sen University, China

Prof. Xiaoyan Gui/ Xian Jiaotong University, China

                                              BEST PAPER AWARDS & TOP 10 CONTRIBUTERS in 5 YEARS AWARDS

16:10-17:40

 (90 mins)

Plenary Talks

(Room A)

Wei TsaoHiSilicon Technologies Co., Ltd, China

Chiplet Technique in Future: Package, Interconnection, and Power Supply

Yukinori Ono/ Research Institute of Electronics, Shizuoka University, Japan

                                                          Control of Electronic Charges and Currents in Nano-scaled Silicon

Saturday, 29 October 2022

08:00-17:00

                                                                                               Registration

08:30-09:10

(40 mins)

Keynote 1

(Room A)

Prof. Peng Zhou/ Fudan University, China

             The Road for 2D Semiconductor in Silicon Age

Keynote 2

(Room B)

Prof. Kai Kang/ University of Electronic Science and 

                                  Technology of China, China

   Wideband CMOS mm-wave circuits design for 5G communications

09:20-10:30

(70 mins)

A1L-A (SC1)

(Room A)

                         Power Amplifiers

A1L-B (SC3)

(Room B)

 Neural Network Hardware Accelerators

A1L-C (SC6)

(Room C)

            Memery Devices

10:50-12:00

(70 mins)

A2L-A (SC2)

(Room A)

               Power Management Techniques

A2L-B (SC5)

(Room B)

      Devices Modeling & Application

A2L-C (SC7)

(Room C)

Packaging & Hybrid Integration

12:00-14:00

Lunch Break

14:00-14:40

(40 mins)

Keynote 3

(Room A)

Prof. Qidong Wang/ Institute of Microelectronics,

Chinese Academy of Sciences, China

                           Advanced Packaging for Chiplet

Keynote 4

(Room B)

Prof. Sai-Weng SIN/ University of Macau, China

The Historical Development of Data Converters

                                         and What We Can Do

14:50-16:00

(70 mins)

A3L-A (SC1)

(Room A)

                   LNA & PLL Techniques

A3L-B (SC3)

(Room B)

     Circuit Techniques for Computing 

                        in Memory

A3L-C (SC6)

(Room C)

           Transistor Devices

16:20-17:50

(90 mins)

A4P-D (SC1-2)

(Room A)

                       Poster: Analog & RF

A4P-E (SC3-5,7-10)

(Room B)

 Poster: Digital, Devices, EDA & Others


Sunday, 30 October 2022

08:00-17:00

Registration

08:30-09:10

(40 mins)

Keynote 5

(Room A)

Prof. Hong Zhou/ Xidian University, China

Near Ideal GaN Schottky Diode for High Efficiency

          and High Power Wireless Power Transfer Application

Keynote 6

(Room B)

Prof. Chunmeng Dou/ Institute of Microelectronics,

Chinese Academy of Sciences, China

Design Highly Efficient RRAM Computing-In-Memory

AI Chips Leveraging the Interplay

                           between Device, Circuit, and System

09:20-10:30

(70 mins)

B1L-A (SC2)

(Room A)

               LDOs & Bandgap References

B1L-B (SC3)

(Room B)

           Digital Circuit Techniques

B1L-C (SC9)

(Room C)

       IC Based Applications

10:50-12:00

(70 mins)

B2L-A (SC2)

(Room A)

      ADC Techniques & its SRAM Application

B2L-B (SC4)

(Room B)

                Building Blocks for 

      High-Speed Wireline Transceivers

B2L-C (SC10)

(Room C)

Two Dimensional & Emerging            Materials & Devices

12:00-14:00

Lunch Break

14:00-15:10

(70 mins)

B3L-A (SC2)

(Room A)

              Relaxation Oscillators & DLLs


B3L-B (SC8)

(Room B)

     Sensory Circuitry & Applications

B3L-C (SC11)

(Room C)

     Algorithm & Circuit for

           Intelligent Robots